Modify

Opened 4 years ago

Last modified 4 years ago

#9912 new Bugs

shared_ptr SEGV in Android debug builds

Reported by: ian@… Owned by: Peter Dimov
Milestone: To Be Determined Component: smart_ptr
Version: Boost 1.55.0 Severity: Problem
Keywords: Cc: Andrey.Semashev@…

Description

Hi,

I get a SEGV in the shared_ptr ref counting code on Android debug builds. Release builds do not have this problem.

Instructions:

  1. Install ndk (I used r9d 64-bit mac)
  2. Ensure ndk-build is on your path
  3. Download the attached sample program
  4. Run build.sh
  5. Install the executable on an Android device (I used a Nexus 7).

As provided, you should get a SEGV in the sp_counted_base code.

There are two ways to fix this:

  1. Remove APP_OPTIM=debug from build.sh
  2. Enable # LOCAL_CPPFLAGS := -DBOOST_SP_USE_PTHREADS in Android.mk

Notes:

Android debug builds disable the -mthumb option and instead use -marm. Ultimately this affects spinlock.hpp

#elif defined(__GNUC__) && defined( __arm__ ) && !defined( __thumb__ )
#  include <boost/smart_ptr/detail/spinlock_gcc_arm.hpp>
 
//code omitted
 
#elif defined(BOOST_HAS_PTHREADS)
#  include <boost/smart_ptr/detail/spinlock_pt.hpp>

So release builds use spinlock_pt.hpp and debug builds use spinlock_gcc_arm.hpp

Attachments (1)

shared_ptr_segv.tbz.tgz (252.7 KB) - added by anonymous 4 years ago.
sample app w/ shared_ptr SEGV

Download all attachments as: .zip

Change History (7)

Changed 4 years ago by anonymous

Attachment: shared_ptr_segv.tbz.tgz added

sample app w/ shared_ptr SEGV

comment:1 Changed 4 years ago by Peter Dimov

What __ARM_ARCH_*__ macro is defined on the Nexus 7?

comment:2 Changed 4 years ago by Andrey Semashev

Cc: Andrey.Semashev@… added

comment:3 Changed 4 years ago by ian@…

The Android NDK supports compiling for two different arm abis. The default is ARMv5TE and it also supports ARMv7-A. These are configured through the armeabi and armeabi-v7a values, respectively.

It is my understanding that armeabi is a subset of armeabi-v7a so that a binary compiled for armeabi should work on all arm android devices.

I did a quick test to answer your question. I grabbed all the ARM_ARCH macros checked in smart_ptr/detail/spinlock_gcc_arm.hpp (these where the only references I could find in the sample app I posted) and created the following function:

void arm_arch() {

#if defined(ARM_ARCH_7)

const char* arch="defined(ARM_ARCH_7)";

#endif #if defined(ARM_ARCH_7A)

const char* arch="defined(ARM_ARCH_7A)";

#endif #if defined(ARM_ARCH_7R)

const char* arch="defined(ARM_ARCH_7R)";

#endif #if defined(ARM_ARCH_7M)

const char* arch="defined(ARM_ARCH_7M)";

#endif #if defined(ARM_ARCH_7EM)

const char* arch="defined(ARM_ARCH_7EM)";

#endif #if defined(ARM_ARCH_7S)

const char* arch="defined(ARM_ARCH_7S)";

#endif #if defined(ARM_ARCH_6)

const char* arch="defined(ARM_ARCH_6)";

#endif #if defined(ARM_ARCH_6J)

const char* arch="defined(ARM_ARCH_6J)";

#endif #if defined(ARM_ARCH_6K)

const char* arch="defined(ARM_ARCH_6K)";

#endif #if defined(ARM_ARCH_6Z)

const char* arch="defined(ARM_ARCH_6Z)";

#endif #if defined(ARM_ARCH_6ZK)

const char* arch="defined(ARM_ARCH_6ZK)";

#endif #if defined(ARM_ARCH_6T2)

const char* arch="defined(ARM_ARCH_6T2)";

#endif

}

As you might expect, none are defined when compiled for armeabi. When compiled for armeabi-v7a, ARM_ARCH_7A is defined.

Also, the armeabi binary exhibits the crash on the Nexus 7, while the armeabi-v7a does not.

comment:4 Changed 4 years ago by Andrey Semashev

Could you also attach the output of command g++ <flags> -dM -E - < /dev/null where <flags> are the compiler switches used by NDK to enable ARMv5TE target?

comment:5 in reply to:  3 Changed 4 years ago by Peter Dimov

Also, the armeabi binary exhibits the crash on the Nexus 7, while the armeabi-v7a does not.

The problem is that, while the ARMv7 and ARMv6 instruction sets have support for memory barriers (the former via a dedicated instruction, DMB, the latter by using the coprocessor #15), earlier instruction sets do not. (Presumably pre-ARMv6 chips didn't support multiprocessing.)

Since the Nexus 7 is a multicore device (I suppose), it needs the memory barriers to be present in the code for the spinlock to work properly. But, since the default configuration doesn't define any ARMv6/ARMv7 macro, we have no way of inserting a memory barrier as we have to assume an earlier instruction set.

In principle, one should be able to compile for ARMv6+ while still using the earlier ABI, but I don't know how.

I'm not sure how we can fix that problem on our side. The only option seems to be to disable spinlock_gcc_arm.hpp altogether when not on ARMv6+ and fall back to phtreads.

comment:6 Changed 4 years ago by ian@…

arm-linux-androideabi-g++ -MMD -MP -MF ./obj/local/armeabi/objs-debug/shared_ptr_crash/main.o.d -fpic -ffunction-sections -funwind-tables -fstack-protector -no-canonical-prefixes -march=armv5te -mtune=xscale -msoft-float -fno-exceptions -fno-rtti -mthumb -Os -g -DNDEBUG -fomit-frame-pointer -fno-strict-aliasing -finline-limit=64 -O0 -UNDEBUG -marm -fno-omit-frame-pointer -I/Users/iwhoyt/projects/speedtestnet-android/toolchain/ndk/sources/cxx-stl/gnu-libstdc++/4.6/include -I/Users/iwhoyt/projects/speedtestnet-android/toolchain/ndk/sources/cxx-stl/gnu-libstdc++/4.6/libs/armeabi/include -I/Users/iwhoyt/projects/speedtestnet-android/toolchain/ndk/sources/cxx-stl/gnu-libstdc++/4.6/include/backward -Ijni -DANDROID -Wa,--noexecstack -Wformat -Werror=format-security -frtti -fexceptions -std=gnu++11 -I/Users/iwhoyt/projects/speedtestnet-android/toolchain/ndk/platforms/android-8/arch-arm/usr/include -dM -E - < /dev/null

cc1: warning: command line option '-std=gnu++11' is valid for C++/ObjC++ but not for C [enabled by default]
cc1: warning: command line option '-frtti' is valid for C++/ObjC++ but not for C [enabled by default]
#define __DBL_MIN_EXP__ (-1021)
#define __UINT_LEAST16_MAX__ 65535
#define __FLT_MIN__ 1.1754943508222875e-38F
#define __UINT_LEAST8_TYPE__ unsigned char
#define __INTMAX_C(c) c ## LL
#define __CHAR_BIT__ 8
#define __UINT8_MAX__ 255
#define __ANDROID__ 1
#define __WINT_MAX__ 4294967295U
#define __ORDER_LITTLE_ENDIAN__ 1234
#define __SIZE_MAX__ 4294967295U
#define __WCHAR_MAX__ 4294967295U
#define __DBL_DENORM_MIN__ ((double)4.9406564584124654e-324L)
#define __FLT_EVAL_METHOD__ 0
#define __unix__ 1
#define __UINT_FAST64_MAX__ 18446744073709551615ULL
#define __SIG_ATOMIC_TYPE__ int
#define __DBL_MIN_10_EXP__ (-307)
#define __FINITE_MATH_ONLY__ 0
#define __ARMEL__ 1
#define __GNUC_PATCHLEVEL__ 0
#define __UINT_FAST8_MAX__ 255
#define __DEC64_MAX_EXP__ 385
#define __INT8_C(c) c
#define __UINT_LEAST64_MAX__ 18446744073709551615ULL
#define __SHRT_MAX__ 32767
#define __LDBL_MAX__ 1.7976931348623157e+308L
#define __ARM_ARCH_5TE__ 1
#define __UINT_LEAST8_MAX__ 255
#define __GXX_TYPEINFO_EQUALITY_INLINE 0
#define __UINTMAX_TYPE__ long long unsigned int
#define __linux 1
#define __DEC32_EPSILON__ 1E-6DF
#define __CHAR_UNSIGNED__ 1
#define __UINT32_MAX__ 4294967295U
#define __LDBL_MAX_EXP__ 1024
#define __WINT_MIN__ 0U
#define __linux__ 1
#define __SCHAR_MAX__ 127
#define __WCHAR_MIN__ 0U
#define __INT64_C(c) c ## LL
#define __DBL_DIG__ 15
#define __SIZEOF_INT__ 4
#define __SIZEOF_POINTER__ 4
#define __USER_LABEL_PREFIX__ 
#define __STDC_HOSTED__ 1
#define __LDBL_HAS_INFINITY__ 1
#define __FLT_EPSILON__ 1.1920928955078125e-7F
#define __APCS_32__ 1
#define __LDBL_MIN__ 2.2250738585072014e-308L
#define __DEC32_MAX__ 9.999999E96DF
#define __INT32_MAX__ 2147483647
#define __SIZEOF_LONG__ 4
#define __UINT16_C(c) c
#define __DECIMAL_DIG__ 17
#define __LDBL_HAS_QUIET_NAN__ 1
#define __GNUC__ 4
#define __FLT_HAS_DENORM__ 1
#define __SIZEOF_LONG_DOUBLE__ 8
#define __BIGGEST_ALIGNMENT__ 8
#define __DBL_MAX__ ((double)1.7976931348623157e+308L)
#define __INT_FAST32_MAX__ 2147483647
#define __DBL_HAS_INFINITY__ 1
#define __DEC32_MIN_EXP__ (-94)
#define __THUMB_INTERWORK__ 1
#define __INT_FAST16_TYPE__ int
#define __LDBL_HAS_DENORM__ 1
#define __DEC128_MAX__ 9.999999999999999999999999999999999E6144DL
#define __INT_LEAST32_MAX__ 2147483647
#define __ARM_PCS 1
#define __DEC32_MIN__ 1E-95DF
#define __DBL_MAX_EXP__ 1024
#define __DEC128_EPSILON__ 1E-33DL
#define __PTRDIFF_MAX__ 2147483647
#define __LONG_LONG_MAX__ 9223372036854775807LL
#define __SIZEOF_SIZE_T__ 4
#define __SIZEOF_WINT_T__ 4
#define __GCC_HAVE_DWARF2_CFI_ASM 1
#define __GXX_ABI_VERSION 1002
#define __SOFTFP__ 1
#define __FLT_MIN_EXP__ (-125)
#define __INT_FAST64_TYPE__ long long int
#define __DBL_MIN__ ((double)2.2250738585072014e-308L)
#define __DEC128_MIN__ 1E-6143DL
#define __REGISTER_PREFIX__ 
#define __UINT16_MAX__ 65535
#define __DBL_HAS_DENORM__ 1
#define __UINT8_TYPE__ unsigned char
#define __NO_INLINE__ 1
#define __FLT_MANT_DIG__ 24
#define __VERSION__ "4.6 20120106 (prerelease)"
#define __UINT64_C(c) c ## ULL
#define __FLOAT_WORD_ORDER__ __ORDER_LITTLE_ENDIAN__
#define __INT32_C(c) c
#define __DEC64_EPSILON__ 1E-15DD
#define __ORDER_PDP_ENDIAN__ 3412
#define __DEC128_MIN_EXP__ (-6142)
#define __INT_FAST32_TYPE__ int
#define __UINT_LEAST16_TYPE__ short unsigned int
#define unix 1
#define __INT16_MAX__ 32767
#define __SIZE_TYPE__ unsigned int
#define __UINT64_MAX__ 18446744073709551615ULL
#define __INT8_TYPE__ signed char
#define __ELF__ 1
#define __FLT_RADIX__ 2
#define __INT_LEAST16_TYPE__ short int
#define __LDBL_EPSILON__ 2.2204460492503131e-16L
#define __UINTMAX_C(c) c ## ULL
#define __SIG_ATOMIC_MAX__ 2147483647
#define __VFP_FP__ 1
#define __SIZEOF_PTRDIFF_T__ 4
#define __DEC32_SUBNORMAL_MIN__ 0.000001E-95DF
#define __INT_FAST16_MAX__ 2147483647
#define __UINT_FAST32_MAX__ 4294967295U
#define __UINT_LEAST64_TYPE__ long long unsigned int
#define __FLT_HAS_QUIET_NAN__ 1
#define __FLT_MAX_10_EXP__ 38
#define __LONG_MAX__ 2147483647L
#define __DEC128_SUBNORMAL_MIN__ 0.000000000000000000000000000000001E-6143DL
#define __FLT_HAS_INFINITY__ 1
#define __unix 1
#define __UINT_FAST16_TYPE__ unsigned int
#define __DEC64_MAX__ 9.999999999999999E384DD
#define __CHAR16_TYPE__ short unsigned int
#define __PRAGMA_REDEFINE_EXTNAME 1
#define __INT_LEAST16_MAX__ 32767
#define __DEC64_MANT_DIG__ 16
#define __INT64_MAX__ 9223372036854775807LL
#define __UINT_LEAST32_MAX__ 4294967295U
#define __INT_LEAST64_TYPE__ long long int
#define __INT16_TYPE__ short int
#define __INT_LEAST8_TYPE__ signed char
#define __DEC32_MAX_EXP__ 97
#define __INT_FAST8_MAX__ 127
#define __INTPTR_MAX__ 2147483647
#define linux 1
#define __EXCEPTIONS 1
#define __LDBL_MANT_DIG__ 53
#define __DBL_HAS_QUIET_NAN__ 1
#define __SIG_ATOMIC_MIN__ (-__SIG_ATOMIC_MAX__ - 1)
#define __INTPTR_TYPE__ int
#define __UINT16_TYPE__ short unsigned int
#define __WCHAR_TYPE__ unsigned int
#define __SIZEOF_FLOAT__ 4
#define __pic__ 1
#define __UINTPTR_MAX__ 4294967295U
#define __DEC64_MIN_EXP__ (-382)
#define __INT_FAST64_MAX__ 9223372036854775807LL
#define __FLT_DIG__ 6
#define __UINT_FAST64_TYPE__ long long unsigned int
#define __INT_MAX__ 2147483647
#define __INT64_TYPE__ long long int
#define __FLT_MAX_EXP__ 128
#define __DBL_MANT_DIG__ 53
#define __INT_LEAST64_MAX__ 9223372036854775807LL
#define __DEC64_MIN__ 1E-383DD
#define __WINT_TYPE__ unsigned int
#define __UINT_LEAST32_TYPE__ unsigned int
#define __SIZEOF_SHORT__ 2
#define __LDBL_MIN_EXP__ (-1021)
#define __arm__ 1
#define __INT_LEAST8_MAX__ 127
#define __SSP__ 1
#define __LDBL_MAX_10_EXP__ 308
#define __DBL_EPSILON__ ((double)2.2204460492503131e-16L)
#define __UINT8_C(c) c
#define __INT_LEAST32_TYPE__ int
#define __SIZEOF_WCHAR_T__ 4
#define __UINT64_TYPE__ long long unsigned int
#define ANDROID 1
#define __INT_FAST8_TYPE__ signed char
#define __DBL_DECIMAL_DIG__ 17
#define __DEC_EVAL_METHOD__ 2
#define __ORDER_BIG_ENDIAN__ 4321
#define __UINT32_C(c) c ## U
#define __INTMAX_MAX__ 9223372036854775807LL
#define __BYTE_ORDER__ __ORDER_LITTLE_ENDIAN__
#define __FLT_DENORM_MIN__ 1.4012984643248171e-45F
#define __INT8_MAX__ 127
#define __PIC__ 1
#define __UINT_FAST32_TYPE__ unsigned int
#define __CHAR32_TYPE__ unsigned int
#define __FLT_MAX__ 3.4028234663852886e+38F
#define __INT32_TYPE__ int
#define __SIZEOF_DOUBLE__ 8
#define __FLT_MIN_10_EXP__ (-37)
#define __INTMAX_TYPE__ long long int
#define __DEC128_MAX_EXP__ 6145
#define __GNUC_MINOR__ 6
#define __UINTMAX_MAX__ 18446744073709551615ULL
#define __DEC32_MANT_DIG__ 7
#define __DBL_MAX_10_EXP__ 308
#define __LDBL_DENORM_MIN__ 4.9406564584124654e-324L
#define __INT16_C(c) c
#define __STDC__ 1
#define __PTRDIFF_TYPE__ int
#define __UINT32_TYPE__ unsigned int
#define __UINTPTR_TYPE__ unsigned int
#define __DEC64_SUBNORMAL_MIN__ 0.000000000000001E-383DD
#define __ARM_EABI__ 1
#define __DEC128_MANT_DIG__ 34
#define __LDBL_MIN_10_EXP__ (-307)
#define __SIZEOF_LONG_LONG__ 8
#define __LDBL_DIG__ 15
#define __FLT_DECIMAL_DIG__ 9
#define __UINT_FAST16_MAX__ 4294967295U
#define __GNUC_GNU_INLINE__ 1
#define __UINT_FAST8_TYPE__ unsigned char
#define __ARM_FEATURE_DSP 1

Modify Ticket

Change Properties
Set your email in Preferences
Action
as new The owner will remain Peter Dimov.

Add Comment


E-mail address and name can be saved in the Preferences.

 
Note: See TracTickets for help on using tickets.